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LMZ14201
www.ti.com
SNVS649F – JANUARY 2010 – REVISED OCTOBER 2013
Additional Features
OUTPUT OVER-VOLTAGE COMPARATOR
The voltage at FB is compared to a 0.92V internal reference. If FB rises above 0.92V the on-time is immediately
terminated. This condition is known as over-voltage protection (OVP). It can occur if the input voltage is
increased very suddenly or if the output load is decreased very suddenly. Once OVP is activated, the top
MOSFET on-times will be inhibited until the condition clears. Additionally, the synchronous MOSFET will remain
on until inductor current falls to zero.
CURRENT LIMIT
Current limit detection is carried out during the off-time by monitoring the current in the synchronous MOSFET.
Referring to the Functional Block Diagram, when the top MOSFET is turned off, the inductor current flows
through the load, the PGND pin and the internal synchronous MOSFET. If this current exceeds 2.0 (typical) the
current limit comparator disables the start of the next on-time period. The next switching cycle will occur only if
the FB input is less than 0.8V and the inductor current has decreased below 2.0A. Inductor current is monitored
during the period of time the synchronous MOSFET is conducting. So long as inductor current exceeds 2.0A,
further on-time intervals for the top MOSFET will not occur. Switching frequency is lower during current limit due
to the longer off-time. It should also be noted that current limit is dependent on both duty cycle and temperature
as illustrated in the graphs in the Typical Performance Characteristics section.
THERMAL PROTECTION
The junction temperature of the LMZ14201 should not be allowed to exceed its maximum ratings. Thermal
protection is implemented by an internal Thermal Shutdown circuit which activates at 165 °C (typ) causing the
device to enter a low power standby state. In this state the main MOSFET remains off causing V O to fall, and
additionally the CSS capacitor is discharged to ground. Thermal protection helps prevent catastrophic failures for
accidental device overheating. When the junction temperature falls back below 145 °C (typ Hyst = 20 °C) the SS
pin is released, V O rises smoothly, and normal operation resumes.
Applications requiring maximum output current especially those at high input voltage may require application
derating at elevated temperatures.
ZERO COIL CURRENT DETECTION
The current of the lower (synchronous) MOSFET is monitored by a zero coil current detection circuit which
inhibits the synchronous MOSFET when its current reaches zero until the next on-time. This circuit enables the
DCM operating mode, which improves efficiency at light loads.
PRE-BIASED STARTUP
The LMZ14201 will properly start up into a pre-biased output. This startup situation is common in multiple rail
logic applications where current paths may exist between different power rails during the startup sequence. The
following scope capture shows proper behavior during this event.
Figure 35. Pre-Biased Startup
OUTPUT
VOLTAGE
2V PRE-BIAS
OUTPUT
CURRENT
ENABLE
3.3V OUTPUT
1.0 V/Div
0.5 A/Div
2.0 V/Div
1 ms/Div
Copyright ? 2010–2013, Texas Instruments Incorporated
Product Folder Links: LMZ14201
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